Clase de entrenamiento intensivo sobre PCIe - Austin Labs Testing and Training

Clase de horario

We offer multiple ways to learn

Flexible delivery options designed to fit your team’s schedule, scale, and learning style.

Formación Virtual

Formación Virtual

Self-paced modules built for engineers who want to learn on their own schedule. Includes videos, text explanations, interactive checkpoints, and hands-on exercises. All based on the same course material used in our live sessions.
    Entrenamiento privado

    Entrenamiento privado

    A dedicated instructor-led session for organizations that want to train multiple engineers at once. Your team gets direct access to an expert, tailored pacing, and the ability to ask questions specific to your environment or use cases.
      Capacitación pública

      Capacitación pública

      Quarterly live sessions open to individual engineers or small groups. Join a scheduled class, learn alongside peers from across the industry, and get real-time instruction using the same core course content.

        Noticias

        Esquema del curso

        Qué Esperar

        Analyzer Operation and Configuration

        Servicios de pruebas de Austin Labs

        Noticias

        Obtenga respuestas concretas y detalladas a sus preguntas:

        • ¿Por qué PCIe 6.0 es tan diferente?
        • ¿Qué son los Flits y por qué son necesarios?
        • ¿Qué ha cambiado con respecto a las versiones anteriores de PCIe?
        • ¿Cómo inicializa PCIe un enlace?
        • ¿En qué se diferencian QoS y el control de flujo en PCIe 6.0?
        • ¿Cómo se negocia un enlace a 64GT/s?
        • ¿Cuáles son las características de ruido de PAM4?

        Learn these things and more in Austin Labs PCIe 6.0 Boot Camp training. Based on the latest PCIe specifications as well as real world test findings from Austin Labs Testing Services, this training covers the PCIe protocol specifically for those with little time who need to understand the basic changes from a high level.

        This class is designed for engineering-minded individuals such as test leads, program managers, design engineers, technical/product field support, and storage/system administrators who need the basics behind the 6.0 changes.

        Lab time included in every class. Outlines are fully customizable for private classes!

        Esquema del curso

        • PAM4 y corrección de errores hacia adelante (FEC)
        • Modo Flit
        • Créditos compartidos
        • Repetición selectiva
        • Cambios en ATS 1.2
        • E/S desordenada
        • Escrituras de memoria diferibles
        • Segmentos y enrutamiento Flit punto a punto
        • Desaprobaciones
        • Se agregaron ECN importantes
        • Operación del analizador en modo Flit

        Qué Esperar

        Nunca pagues extra para ver capturas de seguimiento

        Insight into the standard based on our real world testing experience

        Instruction from experts with over 20 years of experience in storage and networking

        PAM4 y conexión de error de reenvío

        As the transfer rates keep going up, PCI-SIG has found new and innovative ways to make the connections reliable. This section details the basics of this major speed increase and how such simple changes ripple through the architecture.

        • La codificación básica de PAM4
        • Qué significa esto para los márgenes de ruido
        • Corrección de errores hacia adelante
        • Major changes in basic signaling means a complete redesign of the entire protocol
        Modo Flit

        The PCI-SIG was given the chance to completely redesign the protocol used because of the changes brought by PAM4. Flit mode allows that to happen. Many transactions are up to 80% more efficient now.

        • Los prefijos se replantean
        • Optimizaciones de control de flujo
        • Repetición selectiva en ACK-NAK
        • Múltiples TLP en una sola transacción
        • Ranura de retorno DLLP garantizada
        Créditos compartidos

        Rethinking flow control allows a more optimized use of buffer memory, which can now be shared across VCs and TLP types.

        • Créditos fijos
        • Créditos compartidos
        • Paquete de control de flujo optimizado
        • Capas y funcionalidad
        Repetición selectiva

        This change offers increased replay efficiency in noisy environments. This is been one item that has been talked about for years, but could not be done until 6.0 because of the huge impact this small change has on the whole protocol design.

        Escrituras de memoria diferibles

        This section is about some new features added to support other fabric types. There are new remote system type fabrics that have asked for such features that we will see in the future. These are the beginnings of those architectural changes.

        Desaprobaciones

        When a major redesign like this comes along, we have the opportunity to remove outdated ideas, too. This section covers those items.

        Principales ECN desde la versión 5.0

        There have been a few big ECNs that have come out since the release of 5.0. These are detailed here, as they do have bearing on several aspects of 6.0.

        • ATS 1.2
        • Gran poder
        • E/S desordenada

        Operación y configuración del analizador

        Each course features multiple hands on labs that immerse you in the same PCIe analyzer software used by industry professionals to break down and interpret real world traces. You’ll work directly with specialized trace files that we provide, and together we’ll walk through the process of efficiently collecting data, identifying key events, and debugging complex scenarios. These labs are designed to give you practical experience, not just theory, so you’ll leave with the confidence to apply what you’ve learned in real environments.

        En estos laboratorios, usted:

        • Analyze PCIe flit mode boot traces and configuration traces to understand system initialization and protocol behavior.
        • Develop a systematic approach to debugging traces, learning what patterns, anomalies, and error conditions to look for.
        • Gain hands on familiarity with analyzer workflows, so you can replicate the process when working with your own hardware and systems.

        Servicios de pruebas de Austin Labs

        We test customers’ products quickly and thoroughly in an enterprise environment to ensure that products will survive the rigorous demands of mission-critical applications. Customers come to us for our fast turnaround, superior analysis, excellent results, competitive prices, and, of course, 100% confidentiality. We work hand-in-hand with our customers’ engineers to provide solutions, not just information. We provide not only the results of our tests, but also the debug, analysis, and regression testing that is needed to ensure that the products we test perform as expected—not for our customers, but for your customers.

        Acerca de Austin Labs

        Austin Labs is the industry leading third-party testing and training facility. With state-of-the-art test facilities located around the world and industry expertise Austin Labs takes advantage of the wide array of Teledyne LeCroy tools for validation testing of products from server/storage to client systems with expertise in PCIe, NVMe, CXL, Ethernet, Fibre Channel, SAS, SATA, USB, Thunderbolt, Bluetooth, WiFi, HDMI, DisplayPort, MiPi C/D-Phy, MiPi M-Phy, and many others.

        Our engineers helped develop some of the industry’s key technologies and continue to have a vigorous passion for improving products and sharing their knowledge. This experience and enthusiasm translates into the highest quality testing and training services possible.

        Para más información, por favor contacte:

        Austin_Labs_Training@Teledyne.com

        Have a Question or Want to Schedule a Class?

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